Wk 01 · Sep 11 Course Introduction: AI as Workload, AI as Designer
Research question of the weekHow does the relationship between workloads and architectures change when AI can adapt both?
Instructor-selected background
Optional
Reading list
All 26 required readings and 72 optional readings, by week. Back to the schedule.
Computing for AI
AI for Computing
Wk 02 · Sep 18 How to Study an AI Computing System + LLM Inference Fundamentals
Research question of the weekWhat makes a performance model useful when bottlenecks shift with workload, scale, and operating conditions?
Instructor-selected background
- The Tail at Scale CACM 2013
Optional
Wk 03 · Sep 25 Serving Systems for LLMs and AI Agents
Research question of the weekWhat is the right unit of optimization when an AI application is a workflow rather than a single model?
Student-led papers
- KV-cache virtualization, fragmentation, batching, vLLM
Presenter: Aaron Cherian · Presentation slides (PPTX)
- RadixAttention, KV reuse across program structure
Presenters: Gavin Zou, Pingchuan Dong · Presentation slides (PPTX)
Optional
- Architectural Implications of Agentic AI Workflows (arXiv 2026)
- DynamoLLM: Designing LLM Inference Clusters for Performance and Energy Efficiency (HPCA 2025)
- TAPAS: Thermal- and Power-Aware Scheduling for LLM Inference in Cloud Platforms (ASPLOS 2025)
- Splitwise: Efficient Generative LLM Inference Using Phase Splitting (ISCA 2024)
- Agentix: An Efficient Serving Engine for LLM Agents as General Programs (NSDI 2026)
- A Workflow-Aware Serving Layer for Agentic Applications (DyServe, arXiv 2026)
- DistServe: Disaggregating Prefill and Decoding for Goodput-Optimized Large Language Model Serving (OSDI 2024)
- Mooncake: A KVCache-Centric Disaggregated Architecture for LLM Serving (FAST 2025)
- Parrot: Efficient Serving of LLM-Based Applications with Semantic Variable (OSDI 2024)
- Fast Inference from Transformers via Speculative Decoding (ICML 2023)
- Taming Throughput-Latency Tradeoff in LLM Inference with Sarathi-Serve (OSDI 2024)
- MemGPT: Towards LLMs as Operating Systems (2023)
Wk 04 · Oct 2 AI Hardware: Accelerators and System-on-Chips
Research question of the weekWhen does specialization create a lasting advantage, and when does it bind a system too closely to today's workloads?
Student-led papers
- read as a ten-year retrospective
Presenters: Lizhong Wang, Jiangrui Xu · Presentation slides (PPTX)
- inference-driven ASIC and system co-design
Presenters: Shen Li, Yichen Xu · Presentation slides (PPTX)
Optional
- Agile SoC Development with Open ESP (ICCAD 2020)
- Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration (DAC 2021)
- TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings (ISCA 2023)
- Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks (ISCA 2016)
- Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach Using MAESTRO (MICRO 2019)
- Timeloop: A Systematic Approach to DNN Accelerator Evaluation (ISPASS 2019)
- NVIDIA H100 Tensor Core GPU Architecture (Whitepaper, 2022)
- NVIDIA Blackwell Architecture Technical Brief (2024)
Wk 05 · Oct 9 Physical AI I: Inference Systems and Serving for Embodied AI
Research question of the weekHow should computation be organized when the value of a prediction depends on when an action is taken?
Student-led papers
- deployable embodied-AI runtime across heterogeneous robots
Presenters: Ryan Ma, George Wang · Presentation slides (PPTX)
- analytical performance model; device/edge/cloud placement
Presenters: Shiyao Marcus Lam, Pulak Mehrotra · Presentation slides (PDF)
Optional
- VLASH: Real-Time VLAs via Future-State-Aware Asynchronous Inference (arXiv 2025)
- π0: A Vision-Language-Action Flow Model for General Robot Control (RSS 2025)
- OpenVLA: An Open-Source Vision-Language-Action Model (CoRL 2024)
- DeeR-VLA: Dynamic Inference of Multimodal Large Language Models for Efficient Robot Execution (NeurIPS 2024)
- RT-2: Vision-Language-Action Models Transfer Web Knowledge to Robotic Control (CoRL 2023)
- GR00T N1: An Open Foundation Model for Generalist Humanoid Robots (2025)
- Generative AI in Embodied Systems: System-Level Analysis of Performance, Efficiency and Scalability (ISPASS 2025)
Wk 06 · Oct 16 Physical AI II: Hardware-Software Co-Design and Architecture
Research question of the weekWhere should the boundary between algorithm and hardware move when latency, energy, and task success must be optimized together?
Student-led papers
- ReCA: Integrated Acceleration for Real-Time and Efficient Cooperative Embodied Autonomous Agents ASPLOS 2025cross-layer co-design for cooperative embodied agents
- exploiting action, denoising, and multimodality redundancy for embodied-AI action planning
Optional
- DaDu-Corki: Algorithm-Architecture Co-Design for Embodied AI-Powered Robotic Manipulation (ISCA 2025)
- Deltoris: Enabling Real-Time VLA Inference in Embodied AI via Bit-Level Sparsity and Speculative Inference (MICRO 2026)
- Algorithm-Architecture Co-Design for Efficient VLA Inference via Speculative Inference and Verification (MICRO 2026)
- OctoCache: Caching Voxels for Accelerating 3D Occupancy Mapping in Autonomous Systems (ASPLOS 2025)
- RobotPerf: An Open-Source, Vendor-Agnostic, Benchmarking Suite for Evaluating Robotics Computing System Performance (ICRA 2024)
- DaDu Series: Fast and Efficient Robot Accelerators (ICCAD 2020)
- NVIDIA Jetson AGX Orin Series Technical Brief (2022)
- NVIDIA Jetson AGX Thor Developer Kit User Guide (2026)
Wk 07 · Oct 23 Accelerating Neuro-Symbolic and Compositional AI
Research question of the weekHow should computing abstractions change when intelligence combines learning, search, and symbolic reasoning?
Student-led papers
- CogSys: Efficient and Scalable Neurosymbolic Cognition System via Algorithm-Hardware Co-Design HPCA 2025workload characterization, reconfigurable processing
- REASON: Accelerating Probabilistic Logical Reasoning for Scalable Neuro-Symbolic Intelligence HPCA 2026unified DAGs, irregular reasoning acceleration
- compiling Datalog-based neurosymbolic programs to GPUs
Optional
- Scallop: A Language for Neurosymbolic Programming (PLDI 2023)
- DeepProbLog: Neural Probabilistic Logic Programming (NeurIPS 2018)
- NSFlow: An End-to-End FPGA Framework with Scalable Dataflow Architecture for Neuro-Symbolic AI (DAC 2025)
- Towards Cognitive AI Systems: A Survey and Prospective on Neuro-Symbolic AI (ISPASS 2024)
Wk 08 · Oct 30 AI for Software Systems: Compilers and GPU Kernels
Research question of the weekWhat should an AI optimizer be free to change, and which properties must remain invariant?
Student-led papers
- algorithm discovery, reward design, validation
- evolutionary LLM code search across scheduling, TPU circuits, kernels
- benchmark design; discussed with the Sakana AI CUDA Engineer episode
Optional
- CompilerGym: Robust, Performant Compiler Optimization Environments for AI Research (CGO 2022)
- Large Language Models for Compiler Optimization (2023)
- Kevin: Multi-Turn RL for Generating CUDA Kernels (2025)
- Towards Robust Agentic CUDA Kernel Benchmarking, Verification, and Optimization (Sakana AI, 2025)
- ECO: An LLM-Driven Efficient Code Optimizer for Warehouse Scale Computers (2025)
Wk 10 · Nov 13 AI for Computer Architecture I: Measuring and Exploring
Research question of the weekWhat makes a design environment informative enough for an AI agent to discover better architectures?
Student-led papers
- benchmarking LLM agents on architecture tasks
- composable design loops for agent-driven HW/SW co-design
Optional
- ArchAgent: Agentic AI-driven Computer Architecture Discovery (arXiv 2026)
- ArchGym: An Open-Source Gymnasium for Machine Learning Assisted Architecture Design (ISCA 2023)
- AgentDSE: Reasoning-Augmented Architectural Design Space Exploration (MLArchSys 2026)
- LLM-DSE: Searching Accelerator Parameters with LLM Agents (2025)
- ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators Using Reinforcement Learning (MICRO 2020)
- Concorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusion (ISCA 2025)
- QuArch: A Benchmark for Evaluating LLM Reasoning in Computer Architecture (ICML 2026)
- Learning Memory Access Patterns (ICML 2018)
Wk 11 · Nov 20 AI for Computer Architecture II: Architecture 2.0
Research question of the weekWhat would it take for AI-native design to turn high-level intent into better, physically verified systems and chips?
Student-led papers
- ArchOrchestra: End-to-End Agentic Accelerator Design Forthcoming 2026end-to-end agentic accelerator design
- Architecture 2.0: Principles of AI-Native System and Chip Design Online book, 2026Read one chapter.
Optional
- PF-LLM: Large Language Model Hinted Hardware Prefetching (ASPLOS 2026)
- Computer Architecture's AlphaZero Moment: Automated Discovery in an Encircled World (arXiv 2026)
- Agentic Architect: An Agentic AI Framework for Architecture Design Exploration and Optimization (arXiv 2026)
- AgentDSE: Reasoning-Augmented Architectural Design Space Exploration (MLArchSys 2026)
- LLM-DSE: Searching Accelerator Parameters with LLM Agents (2025)
- FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud (ISCA 2018)
- Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs (IEEE Micro 2020)
Wk 12 · Dec 4 AI for RTL and Chip Physical Design
Research question of the weekHow should exploration and verification work together when AI makes consequential design decisions?
Student-led papers
- A Graph Placement Methodology for Fast Chip Design (AlphaChip) Nature 2021 (+2024 addendum) co-led by a pairreinforcement learning for chip placement; co-led by a pair
- ChipNeMo: Domain-Adapted LLMs for Chip Design NVIDIA 2024domain adaptation, retrieval, EDA scripts
- RTL benchmarks and their limitations
Optional
- AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs (2024)
- Using LLMs to Facilitate Formal Verification of RTL (2023)
- DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement (DAC 2019)
- VerilogEval: Evaluating Large Language Models for Verilog Code Generation (ICCAD 2023)
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA (TCAD 2024)
- Automated Multi-Agent Workflows for RTL Design (VeriMaAS, 2025)
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model (2024)
- Chip-Chat: Challenges and Opportunities in Conversational Hardware Design (MLCAD 2023)
- Redwood: A Frontier AI Accelerator Designed, Verified, and Deployed from Scratch in 2 Weeks by AI (2026)